TDM Timing over PSN

This paper provides a brief overview of the theory and practice of timing in pure TDM and TDMoIP networks.
The importance of DM TDM timing signals are Isochronous, which means that the time between two consecutive bits is theoretically always the same. This period is called the unit interval (UI), the signals for the T1 UI is defined as 647 nanoseconds, and for the E1 standards dictate 488 nanoseconds. In order to maintain and isochronicity to stay within the tolerances of accepted standards, a source TDM need a very stable and precise timetable clock.
The stricter requirements are not capricious dictates of standard equipment, but they are of vital importance for the smooth functioning of a high-speed TDM network. Consider a TDM receiver uses its own clock to transform the physical signal back into a bit stream. If the clock runs receive exactly the same height as the source clock, then the recipient must only determine the optimal sampling phase. However, with a mismatch of clock rates, no matter how small, will eventually slips bit. For example, if the clock receive is slower than the clock source of a part per million (ppm), then the receiver output 999999 bits for each 1000000 bits, so erasing one bit. Similarly, if the clock, which is faster than the source clock by one part per billion (ppb), the recipient is a bit wrong every billion bits. A bit every slip million bits acceptable may seem at first glance, but relies on a disastrous two errors per second for a 2 Mbps E1 signal. ITU-T recommendations, dropping a few bits per day for a low rate of 64 kbps channel, but trying to ban bit slips entirely for higher-rate TDM signals.
Temperature changes, defects in material, ageing and external influences will inevitably impair & 39; for a clock rate, whether this is the atomic clock, quartz, or spherical based. Therefore, no time remains exactly the same price forever, and no two physical clocks is exactly the same price for a long time. To something slips, we need to ensure that the two-year average of source and UI watches receive identical (at least the difference, no matter how small, will eventually up to a slip-bit), and that the short - term deviations from the average, according to a variation bounded.
The clock rate over time is conventionally divided into two components, jitter and wander. Migrant expresses slow, smooth drift of the clock rate by temperature fluctuations, aging and slaving inaccuracies, while Jitter provides fast, erratic jumps in the UI by phase noise phenomena and mechanisms bit filling. The border between the two components is conventionally at around 10 Hz bit Brokers, the strict standards of tolerable limits for jitter and wander TDM clocks.
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